Active matrix electroluminescent display

ABSTRACT

An active matrix display includes a display element for producing a visual output when the display element is driven with a constant current, and drive circuitry for controllably driving a substantially constant current through the display element. The drive circuitry includes a two-transistor inverter having an inverter input and a common node output, and the common node output of the inverter is connected, directly or indirectly, to supply or control the current passing through the corresponding display element.

The invention relates to electroluminescent display devices, for exampleusing organic LED devices such as polymer LEDs.

Matrix display devices employing electroluminescent, light-emitting,display elements are well known. The display elements may compriseorganic thin film electroluminescent elements, for example using polymermaterials, or else light emitting diodes (LEDs) using traditional III–Vsemiconductor compounds. Recent developments in organicelectroluminescent materials, particularly polymer materials, havedemonstrated their ability to be used practically for video displaydevices. These materials typically comprise one or more layers of asemiconducting conjugated polymer sandwiched between a pair ofelectrodes, one of which is transparent and the other of which is of amaterial suitable for injecting holes or electrons into the polymerlayer. The organic material can be fabricated using a CVD process, orsimply by a spin coating technique using a solution of a solubleconjugated polymer. Organic electroluminescent materials exhibitdiode-like I–V properties, so that they are capable of providing both adisplay function and a switching function, and can therefore be used inpassive type displays. Alternatively, these materials may be used foractive matrix display devices, with each pixel comprising a displayelement and a switching device for controlling the current through thedisplay element.

Organic electroluminescent materials offer advantages in that they arevery efficient and require relatively low (DC) drive voltages. Moreover,in contrast to conventional LCDs, no backlight is required.

Display devices of this type have current-addressed display elements, sothat a conventional, analogue drive scheme involves supplying acontrollable current to the display element. It is known to provide acurrent source transistor as part of the pixel configuration, with thegate voltage supplied to the current source transistor determining thecurrent through the display element. A storage capacitor holds the gatevoltage after the addressing phase. In a similar manner, a digitallyaddressed display device can be realised by setting the current sourcetransistor to a single (high) current level, or by preventing currentflowing by making the current source transistor non-conducting.

In this way, the display elements are integrated into an active matrix,whereby each display element has an associated switching circuit whichis operable to supply a drive current to the display element so as tomaintain its light output for a significantly longer period than the rowaddress period. Thus, for example, each display element circuit isloaded with an analogue (display data) drive signal once per fieldperiod in a respective row address period, which drive signal is storedand is effective to maintain a required drive current through thedisplay element for a field period until the row of display elementsconcerned is next addressed.

An example of such an active matrix addressed electroluminescent displaydevice is described in EP-A-0717446. The conventional kind of activematrix circuitry used in LCDs cannot be used with electroluminescentdisplay elements as such display elements need to continuously passcurrent in order to generate light whereas the LC display elements arecapacitive and therefore take virtually no current and allow the drivesignal voltage to be stored in the capacitance for the whole fieldperiod. In EP-A-0717446, each switching circuit comprises two TFTs (thinfilm transistors) and a storage capacitor. The anode of the displayelement is connected to the drain of the second TFT and the first TFT isconnected to the gate of the second TFT which is connected also to oneside of the capacitor. During a row address period, the first TFT isturned on by means of a row selection (gating) signal and a drive (data)signal is transferred via this TFT to the capacitor. The data signal maybe either analogue or digital in nature.

After the removal of the selection signal the first TFT turns off andthe voltage stored on the capacitor, constituting a gate voltage for thesecond TFT, is responsible for operation of the second TFT which isarranged to deliver electrical current to the display element. The gateof the first TFT is connected to a gate line (row conductor) common toall display elements in the same row and the source of the first TFT isconnected to a source line (column conductor) common to all displayelements in the same column. The drain and source electrodes of thesecond TFT are connected to the anode of the display element and aground line which extends parallel to the source line and is common toall display elements in the same column. The other side of the capacitoris also connected to this ground line.

The active matrix structure is fabricated on a suitable transparent,insulating, support, for example of glass, using thin film depositionand process technology similar to that used in the manufacture ofAMLCDs.

With this arrangement, the drive current for the light-emitting diodedisplay element is determined by a voltage applied to the gate of thesecond TFT. This current therefore depends strongly on thecharacteristics of that TFT. Variations in threshold voltage, mobilityand dimensions of the TFT will produce unwanted variations in thedisplay element current, and hence its light output. Such variations inthe second TFTs associated with display elements over the area of thearray, or between different arrays, due, for example, to manufacturingprocesses, lead to non-uniformity of light outputs from the displayelements.

In order to address this issue, digital driving options have beenproposed, whereby the pixel is operated by either setting the brightnessto a maximum value for a given drive voltage (digital “on”) or bypreventing current flow (digital “off”). Grey levels are typicallygenerated by using either time-ratio or area-ratio methods known fromthe prior art.

However, the known digital pixel circuits still require storagecapacitors which act as the memory element that stores a voltage. Due toleakage in the pixel the stored voltage value tends to drift and thiscan detract from the performance of the circuit.

Further, the capacitors tend to be large and reduce the aperture of thepixel.

In addition, the gate voltage stored as a result of the current samplingoperation can be subject to variation as a result of TFT parasiticcapacitances. This effect is known as “kick back”.

A further issue with the prior art pixels is that it takes a long timeto charge the storage capacitors, preventing rapid addressing of thepixels. This makes it difficult to successfully apply the time-ratiogrey scale approach, as short addressing times are difficult to realise.

Thus, there remains a need for an improved display device addressingsome or all of these issues.

According to a first aspect of the invention there is provided an activematrix display, including a display element for producing a visualoutput when the display element is driven with a constant current; anddrive circuitry for controllably driving a substantially constantcurrent through the display element, the drive circuitry including a twotransistor inverter having an inverter input and a common node output,wherein the common node output of the inverter is connected, directly orindirectly, to supply or control the current passing through thecorresponding display element.

By providing an inverter having a pair of transistors, the voltage onthe common node output is held by one of the transistors in each state;the common node is not free to oscillate in voltage. This greatlyreduces kick back.

The display element may conveniently be an organic light emitting diode.

The display may include a plurality of data lines for carrying a digitalsignal; a plurality of address lines; and the drive circuitry of eachpixel may include an input node and an address transistor for inputtinga digital signal to the input node, the address transistor beingconnected to one of the address lines, one of the data lines, and theinput node. Thus, the display may be addressed digitally.

According to another aspect of the invention, there is provided anactive matrix display, comprising an array of pixels arranged in rowsand columns, wherein each pixel includes: an organic light emittingdiode display element connected to a drive node; an address transistorconnected between a data line and an input node, the address transistorhaving a control terminal connected to an address line; a drivetransistor connected between a first power line and the drive node todrive the organic light emitting diode, the drive transistor beingcontrolled for inverting operation by the input node; and a feedbackinverter having its input connected to the drive node and its outputconnected to the input node.

The drive circuitry thus functions as a memory that retains data withoutthe need for refreshing. Thus, there is no need for a refresh cycleuntil the data is changed. This can save power.

The feedback loop ensures stability and, as it provides a memoryfunction, allows storage capacitors to be omitted. This may allow areduction in the circuit area required for the circuitry in each pixel.The display may further comprise a discharge transistor of oppositeconductivity type to the drive transistor connected between the drivenode and a second power line, the discharge capacitor and the drivetransistor forming an inverter. In such an arrangement, the kick-back isvirtually zero.

The feedback inverter is conveniently formed by a charge transistorconnected between the first power line and a common node, and adischarge transistor of opposite conductivity type to the chargetransistor connected between the common node and a second power line.

A single common line preferably constitutes a power line of one row andthe address line of an adjacent row. This sharing of one line to havetwo functions increases the aperture of the display and easesmanufacture by reducing the number of row lines required across thedisplay.

The address transistor may be a p-type transistor, and the common linemay be the high power line of one row and the address line of anadjacent row. Alternatively, the address transistor may be an n-typetransistor, and common line may be the low power line of one row and theaddress line of an adjacent row.

In another aspect, the invention proposes an active matrix display,comprising an array of pixels arranged in rows and columns, wherein eachpixel includes: an organic light emitting diode display elementconnected to a drive node; an address transistor connected between adata line and an input node, the address transistor having a controlterminal connected to an address line; a drive transistor connectedbetween a first power line and the drive node to drive the organic lightemitting diode; and a discharge transistor of opposite conductivity typeto the drive transistor connected between the drive node and a secondpower line, the discharge capacitor and the drive transistor forming aninverter controlled by the input node.

In a further aspect, the invention includes a method of driving anactive matrix display including a plurality of pixels each with drivecircuitry including a drive transistor and an inverter and a displayelement, the method including the steps of: addressing the pixels inturn; supplying digital data to the addressed pixels; controlling adrive transistor in inverting operation with the signal on the inputnode to drive a controllable constant current through the displayelement; and feeding back the voltage driving the display elementthrough an inverter to the input node.

Embodiments of the invention will now be described, purely by way ofexample, with reference to the accompanying drawings, in which:

FIG. 1 shows a circuit diagram of a single pixel of a first embodimentof the invention.

FIG. 2 shows a circuit diagram of a single pixel of a second embodimentof the invention.

FIG. 3 shows a circuit diagram of a single pixel of a third embodimentof the invention.

FIG. 4 shows a circuit diagram of a single pixel of a fourth embodimentof the invention.

FIG. 5 shows a circuit diagram of a fifth embodiment of the invention;

FIG. 6 shows a circuit diagram of a sixth embodiment of the invention;and

FIG. 7 shows a schematic diagram of a complete display.

The same reference numbers are used throughout the figures to denote thesame or similar parts.

FIG. 1 shows a single pixel element 2 of a polymer light emitting diodearray according to the invention.

The pixel element is supplied by power line 4 and earth line 6. Addressline 8 and data line 10 also feed into the pixel.

Drive circuitry includes address thin-film transistor (TFT) 12 whichacts as an addressing element which when switched on allows data to beplaced on the pixel from data line 10. In the illustrated embodiment,address TFT 12 is a p-type transistor, but the skilled person willappreciate that n-type transistors can be used also.

A two-transistor inverter 14 is constituted by two TFTs, a charge TFT 16and a discharge TFT 18 connected in series between the power line 4 andthe earth line 6. The charge TFT 16 is a p-type TFT connected betweenpositive power line 4 and drive node 20, and the discharge TFT 18 is ann-type TFT between the drive node 20 and the earth line 6. The gates 24of TFTs 16 and 18 are connected in common to input node 28 which isconnected to the output of addressing TFT 12.

A polymer light emitting diode (PLED) 22 display element is connectedbetween drive node 20 and earth 21.

In use, the drive circuitry switches between an “on” and an “off” mode.In the “on” mode, PLED 22 is driven with a constant current by the drivecircuitry to switch the PLED on and emit light.

In more detail, address line 8 is pulled low to switch on addressing TFT12 and allow the signal on the data line 10 to be passed through toinput 28 of the inverter 14. When the input 28 is high, discharge TFT 18is switched on pulling node 20 low and so switching off the PLED 22.Conversely, when input 28 is low discharge TFT 18 is switched off andcharge TFT 16 switched on to pull node 20 high and drive LED 22.

The data signal is stored on the parasitic capacitance of the gates 24of the inverter TFTs 16,18 even after the address line 8 goes high. Theparasitic capacitance is great enough to retain the state of theinverter until the pixel is addressed again.

The area required for the pixel drive inverter is much less than isconventionally needed for a capacitor.

FIG. 2 illustrates a second embodiment that differs from the arrangementshown in FIG. 1 in that a storage capacitor 26 is provided between theinput node 28 of the address TFT 12 and the power line 4. In thisarrangement, the storage capacitor 26 can be much smaller than in priorarrangements in which a storage capacitor alone has to drive a a singletransistor driving the LED.

FIG. 3 illustrates a further embodiment of the basic design which adds asecond two-transistor feedback inverter 30 having a charge TFT 32 and adischarge TFT 34. The input of the second inverter is connected to drivenode 20 and the output to node 28, the input to the first inverter 14.Thus, the second inverter 30 acts as a feedback device.

In use, the two inverters 14,30 hold the state of the pixel actively, sothat the pixel will remain in its state indefinitely. There is virtuallyno kick back in this configuration.

The pixel stability is enhanced over prior approaches that simply use acapacitance to store data.

The drive circuitry is very fast, principally because there is no largecapacitance to charge. Thus, the drive circuitry is highly suitable fordriving the cell at different on/off time ratios to deliver differentgrey values, especially low grey values. In these drive schemes, thepower required to drive the pixel may be reduced.

FIG. 4 illustrates a further variation, similar to that of FIG. 3 exceptthat first discharge transistor 18 is omitted. The result is that thefirst stage no longer has a discharge TFT 18 for fully switching offPLED 22. In the arrangement of FIG. 4 this effect is achieved bydischarge transistor 34. The discharge TFT 34 of the feedback inverter30 pulls down the input node 28 switching off the drive TFT 16 hard.

It will be noted that a feature of all of the above embodiments is theneed to provide a separate power and earth line to each pixel becausethe PLED ground 21 is not available to act as the low power supply forthe inverter or inverters. FIGS. 5 and 6 illustrate fifth and sixthembodiments of the invention in which the address line is shared with aninverter power line of an adjacent row, therefore reducing the number ofrow lines by one.

In FIG. 5, common line 50 is connected as the high power supply 4 forinverters 14,30 of row 52. The common line is also connected to the gateof p-type address TFTs 12 of the preceding row 54.

In use, common line 50 acts as the power line for one row 52 of pixelsand the address line for the preceding row 54. Thus, common line 50 actsas the power line powering inverters 14,30 of row 52 when it is high,but when it is low it switches on TFT 12 of the preceding row 54 toselect that row. Since adjacent rows are not selected at the same time,there is no conflict between the dual roles of common line 50.

FIG. 6 illustrates a similar arrangement in a n-type addressing scheme.In this case, common line 60 is connected as the low power supply 6 forinverters 14,30 of row 52. The common line is also connected to the gateof n-type address TFT 12 of the preceding row 54.

In use, common line 60 acts as the low power line for one row 52 ofpixels and the address line for the preceding row 54. Thus, common line50 acts as the low power line powering inverters 14,30 of row 52 when itis low, but when it is high it switches on TFT 12 of the preceding row54 to select that row.

As illustrated in FIG. 7, a plurality of pixels 2 are arranged in aplurality of rows 70 and columns 72 to form a complete active matrixelectroluminescent display. Data lines 10 run in the column direction.

The example of FIG. 7 illustrates the arrangement of a completeelectroluminescent display according to the embodiment of FIG. 5, inwhich common power and address lines 50, and low power lines 6 run inthe row direction. Column driver 74 drives the data lines 10, and rowdriver 76 drives the address lines 50,6. It will readily be appreciatedthat similar complete displays may be made using the arrangements ofembodiments 1 to 4 by providing separate high and low power lines 4, 6and address lines 8 running in the row direction.

From reading the present disclosure, other variations and modificationswill be apparent to persons skilled in the art. Such variations andmodifications may involve equivalent and other features which arealready known in the design, manufacture and use of displays and whichmay be used in addition to or instead of features described herein.

For example, the polymer light emitting diode may be replaced by analternative organic light emitting diode, as will be well known to thoseskilled in the art. In addition, other active matrix displays which workon the principle of a pixel circuit supplying a substantially constantcurrent during the operation period can be beneficially driven usingdrive circuitry according to the invention. Examples of such displayprinciples are field emission displays, electrochromic displays,switching mirror displays, displays with local pixel oscillators etc.

1. An active matrix display, comprising an array of pixels (2) arrangedin rows and columns, wherein each pixel includes: a display element (22)for producing a visual output when the display element is driven with aconstant current; drive circuitry for controllably driving asubstantially constant current through the display element, the drivecircuitry including a two transistor inverter (14, 30) having an inputnode (28) and a drive node (20), wherein the common node output of theinverter is connected, directly or indirectly, to supply or control thecurrent passing through the corresponding display element; wherein theactive matrix display further comprises a plurality of data lines (10)for carrying a digital signal, a plurality of address lines (8); whereinthe drive circuitry of each pixel comprises an input mode (28) and anaddress transistor (12) for inputting a digital signal to the inputnode, the address transistor being connected to one of the address lines(8), one of the data lines (10), and the input node (28); and wherein asingle common line (50,60) constitutes a power line of one row and theaddress line of an adjacent row.
 2. An active matrix display accordingto claim 1 wherein the display element (22) is an organic light emittingdiode.
 3. An active matrix display according to claim 1, wherein: thedrive circuitry includes a drive transistor (16) connected between afirst power (4) line and a drive node (20) to drive the display element(22), the drive transistor being controlled for inverting operation bythe input node (28); and the inverter (30) is a feedback inverter havingits input connected to the drive node and its common node outputconnected to the input node.
 4. An active matrix display according toclaim 3 further comprising a discharge transistor (18) of oppositeconductivity type to the drive transistor (16) connected between thedrive node (20) and a second power line (6), the discharge transistorand the drive transistor (16) forming an inverter (14).
 5. A activematrix display according to claim 1, wherein the common node (20) isconnected to drive the display element and the input of the inverter isconnected to the input node.
 6. An active matrix display according toclaim 1 wherein the address transistor is a p-type transistor (12), andthe common line (50) is the high power line of one row and the addressline of an adjacent row.
 7. An active matrix display according to claim1 wherein the address transistor (12) is an n-type transistor, and thecommon line (60) is the low power line of one row and the address lineof an adjacent row.